LPC2468 EmbeddedArtists board and MIIM Interface read cycle

[Nathan Smith]

I am working with the EmbeddedArtists LPC2468 board acquire from Keil. I have tired porting the NicheLite TCP stack and the EMAC application included in the code bundle and see a problem with READ cycles over the MIIM interface to the Micrel PHY.

The MDC clock is running at 2.6MHz and the clock edges and data edges look to be within the timing compliance stated in the Micrel datasheet. The write cycle over the MIIM matches what I expect. However, the READ cycles over the MIIM do not seem to be complete. The last two bits "TA" are not driven from the LPC2468 during a read request. The MDIO line appears to be getting released by the LPC2468 after the last bit of the register address. The PHY never responds to any read requests that I can see with the scope, always ONEs. The MDIO line is pulled high so the last two bits of the read are ONE's, not a don't care and a ZERO as required by the Micrel PHY for a read access.

Any anyone successfully ported either of these projects to the Embedded artists board for the LPC2468 with the Micrel PHY? Does anyone know how to correct this problem? Please help.
Nathan Smith